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472 lines
22 KiB
472 lines
22 KiB
#ifndef COSMOPOLITAN_LIBC_BITS_H_ |
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#define COSMOPOLITAN_LIBC_BITS_H_ |
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#if !(__ASSEMBLER__ + __LINKER__ + 0) |
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COSMOPOLITAN_C_START_ |
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#define CheckUnsigned(x) ((x) / !((typeof(x))(-1) < 0)) |
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|
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/*───────────────────────────────────────────────────────────────────────────│─╗ |
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│ cosmopolitan § bits ─╬─│┼ |
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╚────────────────────────────────────────────────────────────────────────────│*/ |
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extern const bool kTrue; |
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extern const bool kFalse; |
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extern const uint8_t kReverseBits[256]; |
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uint32_t gray(uint32_t) pureconst; |
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uint32_t ungray(uint32_t) pureconst; |
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unsigned bcdadd(unsigned, unsigned) pureconst; |
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unsigned long bcd2i(unsigned long) pureconst; |
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unsigned long i2bcd(unsigned long) pureconst; |
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void bcxcpy(unsigned char (*)[16], unsigned long); |
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int ffs(int) pureconst; |
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int ffsl(long int) pureconst; |
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int ffsll(long long int) pureconst; |
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int fls(int) pureconst; |
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int flsl(long int) pureconst; |
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int flsll(long long int) pureconst; |
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uint8_t bitreverse8(uint8_t) libcesque pureconst; |
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uint16_t bitreverse16(uint16_t) libcesque pureconst; |
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uint32_t bitreverse32(uint32_t) libcesque pureconst; |
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uint64_t bitreverse64(uint64_t) libcesque pureconst; |
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unsigned long roundup2pow(unsigned long) libcesque pureconst; |
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unsigned long roundup2log(unsigned long) libcesque pureconst; |
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unsigned long rounddown2pow(unsigned long) libcesque pureconst; |
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unsigned long hamming(unsigned long, unsigned long) pureconst; |
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/*───────────────────────────────────────────────────────────────────────────│─╗ |
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│ cosmopolitan § bits » no assembly required ─╬─│┼ |
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╚────────────────────────────────────────────────────────────────────────────│*/ |
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/** |
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* Undocumented incantations for ROR, ROL, and SAR. |
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*/ |
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#define ROR(w, k) (CheckUnsigned(w) >> (k) | (w) << (sizeof(w) * 8 - (k))) |
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#define ROL(w, k) ((w) << (k) | CheckUnsigned(w) >> (sizeof(w) * 8 - (k))) |
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#define SAR(w, k) (((w) & ~(~0u >> (k))) | ((w) >> ((k) & (sizeof(w) * 8 - 1)))) |
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#define bitreverse8(X) (kReverseBits[(uint8_t)(X)]) |
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#define bitreverse16(X) \ |
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((uint16_t)kReverseBits[(uint8_t)(X)] << 010 | \ |
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kReverseBits[((uint16_t)(X) >> 010) & 0xff]) |
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#define READ16LE(S) \ |
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((uint16_t)((unsigned char *)(S))[1] << 010 | \ |
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(uint16_t)((unsigned char *)(S))[0] << 000) |
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#define READ32LE(S) \ |
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((uint32_t)((unsigned char *)(S))[3] << 030 | \ |
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(uint32_t)((unsigned char *)(S))[2] << 020 | \ |
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(uint32_t)((unsigned char *)(S))[1] << 010 | \ |
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(uint32_t)((unsigned char *)(S))[0] << 000) |
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#define READ64LE(S) \ |
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((uint64_t)((unsigned char *)(S))[7] << 070 | \ |
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(uint64_t)((unsigned char *)(S))[6] << 060 | \ |
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(uint64_t)((unsigned char *)(S))[5] << 050 | \ |
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(uint64_t)((unsigned char *)(S))[4] << 040 | \ |
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(uint64_t)((unsigned char *)(S))[3] << 030 | \ |
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(uint64_t)((unsigned char *)(S))[2] << 020 | \ |
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(uint64_t)((unsigned char *)(S))[1] << 010 | \ |
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(uint64_t)((unsigned char *)(S))[0] << 000) |
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#define READ16BE(S) \ |
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((uint16_t)((unsigned char *)(S))[0] << 010 | \ |
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(uint16_t)((unsigned char *)(S))[1] << 000) |
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#define READ32BE(S) \ |
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((uint32_t)((unsigned char *)(S))[0] << 030 | \ |
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(uint32_t)((unsigned char *)(S))[1] << 020 | \ |
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(uint32_t)((unsigned char *)(S))[2] << 010 | \ |
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(uint32_t)((unsigned char *)(S))[3] << 000) |
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#define READ64BE(S) \ |
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((uint64_t)((unsigned char *)(S))[0] << 070 | \ |
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(uint64_t)((unsigned char *)(S))[1] << 060 | \ |
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(uint64_t)((unsigned char *)(S))[2] << 050 | \ |
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(uint64_t)((unsigned char *)(S))[3] << 040 | \ |
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(uint64_t)((unsigned char *)(S))[4] << 030 | \ |
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(uint64_t)((unsigned char *)(S))[5] << 020 | \ |
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(uint64_t)((unsigned char *)(S))[6] << 010 | \ |
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(uint64_t)((unsigned char *)(S))[7] << 000) |
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#define read16le(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ16LE(Str); \ |
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}) |
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#define read32le(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ32LE(Str); \ |
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}) |
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#define read64le(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ64LE(Str); \ |
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}) |
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#define read16be(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ16BE(Str); \ |
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}) |
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#define read32be(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ32BE(Str); \ |
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}) |
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#define read64be(S) \ |
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({ \ |
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unsigned char *Str = (unsigned char *)(S); \ |
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READ64BE(Str); \ |
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}) |
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#define WRITE16LE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint16_t Vle = (V); \ |
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Ple[0] = (uint8_t)(Vle >> 000); \ |
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Ple[1] = (uint8_t)(Vle >> 010); \ |
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} while (0) |
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#define WRITE32LE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint32_t Vle = (V); \ |
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Ple[0] = (uint8_t)(Vle >> 000); \ |
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Ple[1] = (uint8_t)(Vle >> 010); \ |
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Ple[2] = (uint8_t)(Vle >> 020); \ |
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Ple[3] = (uint8_t)(Vle >> 030); \ |
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} while (0) |
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#define WRITE64LE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint64_t Vle = (V); \ |
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Ple[0] = (uint8_t)(Vle >> 000); \ |
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Ple[1] = (uint8_t)(Vle >> 010); \ |
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Ple[2] = (uint8_t)(Vle >> 020); \ |
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Ple[3] = (uint8_t)(Vle >> 030); \ |
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Ple[4] = (uint8_t)(Vle >> 040); \ |
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Ple[5] = (uint8_t)(Vle >> 050); \ |
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Ple[6] = (uint8_t)(Vle >> 060); \ |
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Ple[7] = (uint8_t)(Vle >> 070); \ |
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} while (0) |
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#define WRITE16BE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint16_t Vle = (V); \ |
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Ple[1] = (uint8_t)(Vle >> 000); \ |
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Ple[0] = (uint8_t)(Vle >> 010); \ |
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} while (0) |
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#define WRITE32BE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint32_t Vle = (V); \ |
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Ple[3] = (uint8_t)(Vle >> 000); \ |
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Ple[2] = (uint8_t)(Vle >> 010); \ |
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Ple[1] = (uint8_t)(Vle >> 020); \ |
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Ple[0] = (uint8_t)(Vle >> 030); \ |
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} while (0) |
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#define WRITE64BE(P, V) \ |
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do { \ |
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uint8_t *Ple = (uint8_t *)(P); \ |
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uint64_t Vle = (V); \ |
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Ple[7] = (uint8_t)(Vle >> 000); \ |
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Ple[6] = (uint8_t)(Vle >> 010); \ |
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Ple[5] = (uint8_t)(Vle >> 020); \ |
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Ple[4] = (uint8_t)(Vle >> 030); \ |
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Ple[3] = (uint8_t)(Vle >> 040); \ |
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Ple[2] = (uint8_t)(Vle >> 050); \ |
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Ple[1] = (uint8_t)(Vle >> 060); \ |
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Ple[0] = (uint8_t)(Vle >> 070); \ |
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} while (0) |
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/*───────────────────────────────────────────────────────────────────────────│─╗ |
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│ cosmopolitan § bits » some assembly required ─╬─│┼ |
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╚────────────────────────────────────────────────────────────────────────────│*/ |
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/** |
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* Constraints for virtual machine flags. |
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* @note we beseech clang devs for flag constraints |
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*/ |
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#ifdef __GCC_ASM_FLAG_OUTPUTS__ /* GCC6+ CLANG10+ */ |
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#define CFLAG_CONSTRAINT "=@ccc" |
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#define CFLAG_ASM(OP) OP |
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#define ZFLAG_CONSTRAINT "=@ccz" |
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#define ZFLAG_ASM(OP) OP |
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#define OFLAG_CONSTRAINT "=@cco" |
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#define OFLAG_ASM(OP) OP |
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#define SFLAG_CONSTRAINT "=@ccs" |
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#define SFLAG_ASM(SP) SP |
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#define ABOVE_CONSTRAINT "=@cca" /* i.e. !ZF && !CF */ |
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#define ABOVEFLAG_ASM(OP) OP |
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#else |
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#define CFLAG_CONSTRAINT "=q" |
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#define CFLAG_ASM(OP) OP "\n\tsetc\t%b0" |
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#define ZFLAG_CONSTRAINT "=q" |
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#define ZFLAG_ASM(OP) OP "\n\tsetz\t%b0" |
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#define OFLAG_CONSTRAINT "=q" |
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#define OFLAG_ASM(OP) OP "\n\tseto\t%b0" |
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#define SFLAG_CONSTRAINT "=q" |
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#define SFLAG_ASM(SP) OP "\n\tsets\t%b0" |
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#define ABOVE_CONSTRAINT "=@cca" |
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#define ABOVEFLAG_ASM(OP) OP "\n\tseta\t%b0" |
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#endif |
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/** |
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* Reads scalar from memory w/ one operation. |
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* |
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* @param MEM is alignas(𝑘) uint𝑘_t[hasatleast 1] where 𝑘 ∈ {8,16,32,64} |
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* @return *(MEM) |
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* @note defeats compiler load tearing optimizations |
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* @note alignas(𝑘) is implied if compiler knows type |
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* @note alignas(𝑘) only avoids multi-core / cross-page edge cases |
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* @see Intel's Six-Thousand Page Manual V.3A §8.2.3.1 |
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* @see atomic_store() |
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*/ |
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#define atomic_load(MEM) \ |
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({ \ |
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autotype(MEM) Mem = (MEM); \ |
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typeof(*Mem) Reg; \ |
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asm("mov\t%1,%0" : "=r"(Reg) : "m"(*Mem)); \ |
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Reg; \ |
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}) |
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/** |
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* Saves scalar to memory w/ one operation. |
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* |
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* This is guaranteed to happen in either one or zero operations, |
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* depending on whether or not it's possible for *(MEM) to be read |
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* afterwards. This macro only forbids compiler from using >1 ops. |
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* |
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* @param MEM is alignas(𝑘) uint𝑘_t[hasatleast 1] where 𝑘 ∈ {8,16,32,64} |
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* @param VAL is uint𝑘_t w/ better encoding for immediates (constexpr) |
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* @return VAL |
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* @note alignas(𝑘) on nexgen32e only needed for end of page gotcha |
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* @note alignas(𝑘) is implied if compiler knows type |
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* @note needed to defeat store tearing optimizations |
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* @see Intel Six-Thousand Page Manual Manual V.3A §8.2.3.1 |
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* @see atomic_load() |
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*/ |
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#define atomic_store(MEM, VAL) \ |
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({ \ |
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autotype(VAL) Val = (VAL); \ |
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typeof(&Val) Mem = (MEM); \ |
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asm("mov%z1\t%1,%0" : "=m,m"(*Mem) : "i,r"(Val)); \ |
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Val; \ |
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}) |
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/** |
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* Returns true if bit is set in memory. |
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* |
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* This is a generically-typed Bitset<T> ∀ RAM. This macro is intended |
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* to be container-like with optimal machine instruction encoding, cf. |
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* machine-agnostic container abstractions. Memory accesses are words. |
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* Register allocation can be avoided if BIT is known. Be careful when |
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* casting character arrays since that should cause a page fault. |
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* |
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* @param MEM is uint𝑘_t[] where 𝑘 ∈ {16,32,64} base address |
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* @param BIT ∈ [-(2**(𝑘-1)),2**(𝑘-1)) is zero-based index |
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* @return true if bit is set, otherwise false |
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* @see Intel's Six Thousand Page Manual V.2A 3-113 |
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* @see bts(), btr(), btc() |
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*/ |
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#define bt(MEM, BIT) \ |
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({ \ |
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bool OldBit; \ |
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if (isconstant(BIT)) { \ |
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asm(CFLAG_ASM("bt%z1\t%2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit) \ |
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: "m"((MEM)[(BIT) / (sizeof((MEM)[0]) * CHAR_BIT)]), \ |
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"J"((BIT) % (sizeof((MEM)[0]) * CHAR_BIT)) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 2) { \ |
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asm(CFLAG_ASM("bt\t%w2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit) \ |
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: "m"((MEM)[0]), "r"(BIT) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 4) { \ |
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asm(CFLAG_ASM("bt\t%k2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit) \ |
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: "m"((MEM)[0]), "r"(BIT) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 8) { \ |
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asm(CFLAG_ASM("bt\t%q2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit) \ |
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: "m"((MEM)[0]), "r"(BIT) \ |
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: "cc"); \ |
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} \ |
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OldBit; \ |
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}) |
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#define bts(MEM, BIT) __BitOp("bts", BIT, MEM) /** bit test and set */ |
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#define btr(MEM, BIT) __BitOp("btr", BIT, MEM) /** bit test and reset */ |
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#define btc(MEM, BIT) __BitOp("btc", BIT, MEM) /** bit test and complement */ |
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#define lockbts(MEM, BIT) __BitOp("lock bts", BIT, MEM) |
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#define lockbtr(MEM, BIT) __BitOp("lock btr", BIT, MEM) |
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#define lockbtc(MEM, BIT) __BitOp("lock btc", BIT, MEM) |
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#define lockinc(MEM) __ArithmeticOp1("lock inc", MEM) |
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#define lockdec(MEM) __ArithmeticOp1("lock dec", MEM) |
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#define locknot(MEM) __ArithmeticOp1("lock not", MEM) |
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#define lockneg(MEM) __ArithmeticOp1("lock neg", MEM) |
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#define lockaddeq(MEM, VAL) __ArithmeticOp2("lock add", VAL, MEM) |
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#define locksubeq(MEM, VAL) __ArithmeticOp2("lock sub", VAL, MEM) |
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#define lockxoreq(MEM, VAL) __ArithmeticOp2("lock xor", VAL, MEM) |
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#define lockandeq(MEM, VAL) __ArithmeticOp2("lock and", VAL, MEM) |
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#define lockoreq(MEM, VAL) __ArithmeticOp2("lock or", VAL, MEM) |
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/** |
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* Exchanges *MEMORY into *LOCALVAR w/ one operation. |
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* |
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* @param MEMORY is uint𝑘_t[hasatleast 1] where 𝑘 ∈ {8,16,32,64} |
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* @param LOCALVAR is uint𝑘_t[hasatleast 1] |
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* @return LOCALVAR[0] |
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* @see xchg() |
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*/ |
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#define lockxchg(MEMORY, LOCALVAR) \ |
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({ \ |
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static_assert(typescompatible(typeof(*(MEMORY)), typeof(*(LOCALVAR)))); \ |
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asm("xchg\t%0,%1" : "+%m"(*(MEMORY)), "+r"(*(LOCALVAR))); \ |
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*(LOCALVAR); \ |
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}) |
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/** |
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* Compares and exchanges. |
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* |
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* @param IFTHING is uint𝑘_t[hasatleast 1] where 𝑘 ∈ {8,16,32,64} |
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* @return true if value was exchanged, otherwise false |
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* @see lockcmpxchg() |
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*/ |
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#define cmpxchg(IFTHING, ISEQUALTOME, REPLACEITWITHME) \ |
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({ \ |
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bool DidIt; \ |
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asm(ZFLAG_ASM("cmpxchg\t%3,%1") \ |
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: ZFLAG_CONSTRAINT(DidIt), "+m"(*(IFTHING)), "+a"(*(ISEQUALTOME)) \ |
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: "r"((typeof(*(IFTHING)))(REPLACEITWITHME)) \ |
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: "cc"); \ |
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DidIt; \ |
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}) |
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#define ezcmpxchg(IFTHING, ISEQUALTOME, REPLACEITWITHME) \ |
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({ \ |
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bool DidIt; \ |
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autotype(IFTHING) IfThing = (IFTHING); \ |
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typeof(*IfThing) IsEqualToMe = (ISEQUALTOME); \ |
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typeof(*IfThing) ReplaceItWithMe = (REPLACEITWITHME); \ |
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asm(ZFLAG_ASM("cmpxchg\t%3,%1") \ |
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: ZFLAG_CONSTRAINT(DidIt), "+m"(*IfThing), "+a"(IsEqualToMe) \ |
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: "r"(ReplaceItWithMe) \ |
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: "cc"); \ |
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DidIt; \ |
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}) |
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/** |
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* Compares and exchanges w/ one operation. |
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* |
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* @param IFTHING is uint𝑘_t[hasatleast 1] where 𝑘 ∈ {8,16,32,64} |
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* @return true if value was exchanged, otherwise false |
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* @see lockcmpxchg() |
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*/ |
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#define lockcmpxchg(IFTHING, ISEQUALTOME, REPLACEITWITHME) \ |
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({ \ |
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bool DidIt; \ |
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asm(ZFLAG_ASM("lock cmpxchg\t%3,%1") \ |
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: ZFLAG_CONSTRAINT(DidIt), "+m"(*(IFTHING)), "+a"(*(ISEQUALTOME)) \ |
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: "r"((typeof(*(IFTHING)))(REPLACEITWITHME)) \ |
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: "cc"); \ |
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DidIt; \ |
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}) |
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/** |
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* Gets value of extended control register. |
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*/ |
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#define xgetbv(xcr_register_num) \ |
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({ \ |
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unsigned hi, lo; \ |
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asm("xgetbv" : "=d"(hi), "=a"(lo) : "c"(cr_register_num)); \ |
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(uint64_t) hi << 32 | lo; \ |
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}) |
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/** |
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* Reads model-specific register. |
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* @note programs running as guests won't have authorization |
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*/ |
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#define rdmsr(msr) \ |
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({ \ |
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uint32_t lo, hi; \ |
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asm volatile("rdmsr" : "=a"(lo), "=d"(hi) : "c"(msr)); \ |
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(uint64_t) hi << 32 | lo; \ |
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}) |
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/** |
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* Writes model-specific register. |
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* @note programs running as guests won't have authorization |
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*/ |
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#define wrmsr(msr, val) \ |
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do { \ |
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uint64_t val_ = (val); \ |
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asm volatile("wrmsr" \ |
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: /* no outputs */ \ |
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: "c"(msr), "a"((uint32_t)val_), \ |
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"d"((uint32_t)(val_ >> 32))); \ |
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} while (0) |
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/** |
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* Tells CPU page tables changed for virtual address. |
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* @note programs running as guests won't have authorization |
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*/ |
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#define invlpg(MEM) \ |
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asm volatile("invlpg\t(%0)" : /* no outputs */ : "r"(MEM) : "memory") |
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#define IsAddressCanonicalForm(P) \ |
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({ \ |
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intptr_t p2 = (intptr_t)(P); \ |
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(0xffff800000000000l <= p2 && p2 <= 0x00007fffffffffffl); \ |
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}) |
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/*───────────────────────────────────────────────────────────────────────────│─╗ |
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│ cosmopolitan § bits » implementation details ─╬─│┼ |
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╚────────────────────────────────────────────────────────────────────────────│*/ |
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#define __ArithmeticOp1(OP, MEM) \ |
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({ \ |
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asm(OP "%z0\t%0" : "+m"(*(MEM)) : /* no inputs */ : "cc"); \ |
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MEM; \ |
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}) |
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#define __ArithmeticOp2(OP, VAL, MEM) \ |
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({ \ |
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asm(OP "%z0\t%1,%0" : "+m,m"(*(MEM)) : "i,r"(VAL) : "cc"); \ |
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MEM; \ |
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}) |
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#define __BitOp(OP, BIT, MEM) \ |
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({ \ |
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bool OldBit; \ |
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if (isconstant(BIT)) { \ |
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asm(CFLAG_ASM(OP "%z1\t%2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit), \ |
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"+m"((MEM)[(BIT) / (sizeof((MEM)[0]) * CHAR_BIT)]) \ |
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: "J"((BIT) % (sizeof((MEM)[0]) * CHAR_BIT)) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 2) { \ |
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asm(CFLAG_ASM(OP "\t%w2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit), "+m"((MEM)[0]) \ |
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: "r"(BIT) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 4) { \ |
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asm(CFLAG_ASM(OP "\t%k2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit), "+m"((MEM)[0]) \ |
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: "r"(BIT) \ |
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: "cc"); \ |
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} else if (sizeof((MEM)[0]) == 8) { \ |
|
asm(CFLAG_ASM(OP "\t%q2,%1") \ |
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: CFLAG_CONSTRAINT(OldBit), "+m"((MEM)[0]) \ |
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: "r"(BIT) \ |
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: "cc"); \ |
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} \ |
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OldBit; \ |
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}) |
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|
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COSMOPOLITAN_C_END_ |
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#endif /* !(__ASSEMBLER__ + __LINKER__ + 0) */ |
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#endif /* COSMOPOLITAN_LIBC_BITS_H_ */
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