2020-06-15 14:18:57 +00:00
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/* clang-format off */
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//$ nobt
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//$ nocpp
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/**
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* @file avir_float4_sse.h
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*
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* @brief Inclusion file for the "float4" type.
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*
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* This file includes the "float4" SSE-based type used for SIMD variable
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* storage and processing.
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*
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* AVIR Copyright (c) 2015-2019 Aleksey Vaneev
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*/
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#ifndef AVIR_FLOAT4_SSE_INCLUDED
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#define AVIR_FLOAT4_SSE_INCLUDED
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#include "third_party/avir/avir.h"
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#include "libc/bits/mmintrin.h"
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#include "libc/bits/xmmintrin.h"
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#include "libc/bits/xmmintrin.h"
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2020-06-21 07:10:11 +00:00
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#include "libc/bits/xmmintrin.h"
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2020-06-15 14:18:57 +00:00
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#include "libc/bits/emmintrin.h"
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namespace avir {
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/**
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* @brief SIMD packed 4-float type.
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*
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* This class implements a packed 4-float type that can be used to perform
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* parallel computation using SIMD instructions on SSE-enabled processors.
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* This class can be used as the "fptype" argument of the avir::fpclass_def
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* class.
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*/
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class float4
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{
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public:
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float4()
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{
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}
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float4( const float4& s )
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: value( s.value )
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{
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}
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float4( const __m128 s )
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: value( s )
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{
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}
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float4( const float s )
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: value( _mm_set1_ps( s ))
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{
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}
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float4& operator = ( const float4& s )
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{
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value = s.value;
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return( *this );
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}
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float4& operator = ( const __m128 s )
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{
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value = s;
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return( *this );
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}
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float4& operator = ( const float s )
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{
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value = _mm_set1_ps( s );
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return( *this );
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}
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operator float () const
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{
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return( _mm_cvtss_f32( value ));
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}
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/**
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* @param p Pointer to memory from where the value should be loaded,
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* should be 16-byte aligned.
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* @return float4 value loaded from the specified memory location.
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*/
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static float4 load( const float* const p )
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{
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return( _mm_load_ps( p ));
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}
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/**
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* @param p Pointer to memory from where the value should be loaded,
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* may have any alignment.
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* @return float4 value loaded from the specified memory location.
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*/
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static float4 loadu( const float* const p )
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{
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return( _mm_loadu_ps( p ));
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}
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/**
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* @param p Pointer to memory from where the value should be loaded,
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* may have any alignment.
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* @param lim The maximum number of elements to load, >0.
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* @return float4 value loaded from the specified memory location, with
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* elements beyond "lim" set to 0.
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*/
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static float4 loadu( const float* const p, int lim )
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{
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if( lim > 2 )
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{
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if( lim > 3 )
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{
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return( _mm_loadu_ps( p ));
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}
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else
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{
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return( _mm_set_ps( 0.0f, p[ 2 ], p[ 1 ], p[ 0 ]));
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}
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}
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else
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{
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if( lim == 2 )
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{
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return( _mm_set_ps( 0.0f, 0.0f, p[ 1 ], p[ 0 ]));
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}
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else
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{
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return( _mm_load_ss( p ));
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}
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}
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}
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/**
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* Function stores *this value to the specified memory location.
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*
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* @param[out] p Output memory location, should be 16-byte aligned.
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*/
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void store( float* const p ) const
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{
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_mm_store_ps( p, value );
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}
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/**
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* Function stores *this value to the specified memory location.
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*
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* @param[out] p Output memory location, may have any alignment.
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*/
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void storeu( float* const p ) const
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{
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_mm_storeu_ps( p, value );
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}
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/**
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* Function stores "lim" lower elements of *this value to the specified
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* memory location.
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*
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* @param[out] p Output memory location, may have any alignment.
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* @param lim The number of lower elements to store, >0.
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*/
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void storeu( float* const p, int lim ) const
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{
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if( lim > 2 )
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{
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if( lim > 3 )
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{
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_mm_storeu_ps( p, value );
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}
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else
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{
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_mm_storel_pi( (__m64*) p, value );
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_mm_store_ss( p + 2, _mm_movehl_ps( value, value ));
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}
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}
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else
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{
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if( lim == 2 )
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{
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_mm_storel_pi( (__m64*) p, value );
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}
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else
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{
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_mm_store_ss( p, value );
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}
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}
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}
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float4& operator += ( const float4& s )
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{
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value = _mm_add_ps( value, s.value );
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return( *this );
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}
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float4& operator -= ( const float4& s )
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{
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value = _mm_sub_ps( value, s.value );
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return( *this );
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}
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float4& operator *= ( const float4& s )
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{
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value = _mm_mul_ps( value, s.value );
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return( *this );
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}
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float4& operator /= ( const float4& s )
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{
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value = _mm_div_ps( value, s.value );
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return( *this );
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}
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float4 operator + ( const float4& s ) const
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{
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return( _mm_add_ps( value, s.value ));
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}
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float4 operator - ( const float4& s ) const
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{
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return( _mm_sub_ps( value, s.value ));
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}
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float4 operator * ( const float4& s ) const
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{
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return( _mm_mul_ps( value, s.value ));
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}
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float4 operator / ( const float4& s ) const
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{
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return( _mm_div_ps( value, s.value ));
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}
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/**
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* @return Horizontal sum of elements.
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*/
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float hadd() const
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{
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const __m128 v = _mm_add_ps( value, _mm_movehl_ps( value, value ));
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const __m128 res = _mm_add_ss( v, _mm_shuffle_ps( v, v, 1 ));
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return( _mm_cvtss_f32( res ));
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}
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/**
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* Function performs in-place addition of a value located in memory and
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* the specified value.
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*
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* @param p Pointer to value where addition happens. May be unaligned.
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* @param v Value to add.
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*/
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static void addu( float* const p, const float4& v )
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{
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( loadu( p ) + v ).storeu( p );
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}
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/**
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* Function performs in-place addition of a value located in memory and
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* the specified value. Limited to the specfied number of elements.
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*
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* @param p Pointer to value where addition happens. May be unaligned.
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* @param v Value to add.
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* @param lim The element number limit, >0.
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*/
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static void addu( float* const p, const float4& v, const int lim )
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{
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( loadu( p, lim ) + v ).storeu( p, lim );
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}
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__m128 value; ///< Packed value of 4 floats.
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///<
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};
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/**
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* SIMD rounding function, exact result.
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*
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* @param v Value to round.
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* @return Rounded SIMD value.
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*/
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inline float4 round( const float4& v )
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{
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unsigned int prevrm = _MM_GET_ROUNDING_MODE();
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_MM_SET_ROUNDING_MODE( _MM_ROUND_NEAREST );
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const __m128 res = _mm_cvtepi32_ps( _mm_cvtps_epi32( v.value ));
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_MM_SET_ROUNDING_MODE( prevrm );
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return( res );
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}
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/**
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* SIMD function "clamps" (clips) the specified packed values so that they are
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* not lesser than "minv", and not greater than "maxv".
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*
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* @param Value Value to clamp.
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* @param minv Minimal allowed value.
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* @param maxv Maximal allowed value.
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* @return The clamped value.
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*/
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inline float4 clamp( const float4& Value, const float4& minv,
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const float4& maxv )
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{
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return( _mm_min_ps( _mm_max_ps( Value.value, minv.value ), maxv.value ));
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}
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typedef fpclass_def< avir :: float4, float > fpclass_float4; ///<
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///< Class that can be used as the "fpclass" template parameter of the
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///< avir::CImageResizer class to perform calculation using default
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///< interleaved algorithm, using SIMD float4 type.
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///<
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} // namespace avir
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#endif // AVIR_FLOAT4_SSE_INCLUDED
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