2020-06-15 14:18:57 +00:00
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#ifndef APE_CONFIG_H_
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#define APE_CONFIG_H_
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#include "ape/relocations.h"
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#include "libc/macros.h"
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/**
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* @fileverview αcτµαlly pδrταblε εxεcµταblε configuration.
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*/
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/**
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* Post-Initialization Read-Only Code Size Threshold.
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*
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* An executable needs to have at least this much code, before the
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* linker adds non-mandatory 4kb alignments. The benefit is better
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* memory protection. The tradeoff is sparser binaries.
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*/
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#ifndef APE_PIRO_THRESHOLD
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#ifdef CONFIG_DBG
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#define APE_PIRO_THRESHOLD 0x1000
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#else
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#define APE_PIRO_THRESHOLD 0x10000
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#endif
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#endif
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/**
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* PC Standard I/O Configuration.
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*/
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#ifndef METAL_STDIN
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#define METAL_STDIN COM1
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#endif
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#ifndef METAL_STDOUT
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#define METAL_STDOUT COM1
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#endif
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#ifndef METAL_STDERR
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2020-10-29 11:53:20 +00:00
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#define METAL_STDERR COM1
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2020-06-15 14:18:57 +00:00
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#endif
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/**
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* PC Display Configuration (MDA/CGA)
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* @see www.lammertbies.nl/comm/info/serial-uart.html
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* @see ape/lib/vidya.h
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*/
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#ifndef VIDYA_MODE
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2020-09-07 04:39:00 +00:00
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#define VIDYA_MODE VIDYA_MODE_CGA
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2020-06-15 14:18:57 +00:00
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#endif
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/* FPU Control Word (x87) Exception Masks
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@see Intel Manual V1 §8.1.5
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IM: Invalid Operation ───────────────┐
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DM: Denormal Operand ───────────────┐│
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ZM: Zero Divide ───────────────────┐││
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OM: Overflow ─────────────────────┐│││
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UM: Underflow ───────────────────┐││││
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PM: Precision ──────────────────┐│││││
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PC: Precision Control ────────┐ ││││││
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{float,∅,double,long double} │ ││││││
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RC: Rounding Control ───────┐ │ ││││││
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{even, →-∞, →+∞, →0} │┌┤ ││││││
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┌┤││ ││││││
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d││││rr││││││*/
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#define X87_NORMAL 0b000000000001101111111
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#define X87_DTOA 0b000000000001000000000
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#define X87_DTOA_MASK 0b000000000001100000000
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#ifndef X87_DEFAULT
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#define X87_DEFAULT X87_NORMAL
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#endif
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/**
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* Serial Line Configuration (8250 UART 16550)
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* @see ape/lib/uart.h
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*/
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#ifndef UART_BAUD_RATE
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#define UART_BAUD_RATE 9600 /* bits per second ∈ [50,115200] */
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#endif
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#define UART_CONF_DLR (1843200 /*hz*/ / 16 /*wut*/ / (UART_BAUD_RATE))
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#ifndef UART_CONF_IIR
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/* ┌interrupt trigger level {1,4,8,14}
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│ ┌enable 64 byte fifo (UART 16750+)
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│ │ ┌select dma mode
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│ │ │┌clear transmit fifo
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│ │ ││┌clear receive fifo
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├┐│ │││┌enable fifos*/
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#define UART_CONF_IIR 0b00000000
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#endif
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#ifndef UART_CONF_LCR
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/* ┌dlab: flips configuration mode state
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│┌enable break signal
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││ ┌parity {none,odd,even,high,low}
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││ │ ┌extra stop bit
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││ │ │┌data word length (bits+5)
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││┌┴┐│├┐*/
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#define UART_CONF_LCR 0b01000011
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#endif
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/**
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* eXtreme Low Memory.
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*/
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#define XLM(VAR) (XLM_BASE_REAL + XLM_##VAR)
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#define XLMV(VAR) (__xlm + XLM_##VAR)
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#define XLM_BASE_REAL 0x1000
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#define XLM_E820 0
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#define XLM_E820_SIZE 0x2000
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#define XLM_BIOS_DATA_AREA 0x2000
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#define XLM_BIOS_DATA_AREA_SIZE 256
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#define XLM_DRIVE_BASE_TABLE 0x2200 /* drive values are contiguous */
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#define XLM_DRIVE_BASE_TABLE_SIZE 11
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#define XLM_DRIVE_TYPE 0x220b
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#define XLM_DRIVE_TYPE_SIZE 1
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#define XLM_DRIVE_LAST_SECTOR 0x220c /* 1-based inclusive, e.g. 18 */
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#define XLM_DRIVE_LAST_SECTOR_SIZE 1
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#define XLM_DRIVE_LAST_CYLINDER 0x220d /* 0-based incl, e.g. 79 */
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#define XLM_DRIVE_LAST_CYLINDER_SIZE 2
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#define XLM_DRIVE_ATTACHED 0x220f
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#define XLM_DRIVE_ATTACHED_SIZE 1
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#define XLM_DRIVE_LAST_HEAD 0x2210 /* 0-based inclusive, e.g. 1 */
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#define XLM_DRIVE_LAST_HEAD_SIZE 1
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#define XLM_DRIVE 0x2211
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#define XLM_DRIVE_SIZE 1
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#define XLM_HAVEEXTMEMKB 0x2212
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#define XLM_HAVEEXTMEMKB_SIZE 4
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#define XLM_VIDEO_POSITION_FAR_POINTER 0x2216 /* video cursor far pointer */
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#define XLM_VIDEO_POSITION_FAR_POINTER_SIZE 4
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#define XLM_PAGE_TABLE_STACK_POINTER 0x2220
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#define XLM_PAGE_TABLE_STACK_POINTER_SIZE 8
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#define XLM_BADIDT 0x2230
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#define XLM_BADIDT_SIZE 6
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#define XLM_LOADSTATE 0x2240
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#define XLM_LOADSTATE_SIZE 4
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#define XLM_SIZE ROUNDUP(XLM_LOADSTATE + XLM_LOADSTATE_SIZE, 0x1000)
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#define IMAGE_BASE_REAL (XLM_BASE_REAL + XLM_SIZE)
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#if !defined(__LINKER__) && !defined(__ASSEMBLER__)
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extern char __xlm[XLM_SIZE];
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#endif /* !defined(__LINKER__) && !defined(__ASSEMBLER__) */
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#endif /* APE_CONFIG_H_ */
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