2020-06-16 13:38:43 +00:00
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/*-*- mode:unix-assembly; indent-tabs-mode:t; tab-width:8; coding:utf-8 -*-│
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2020-06-15 14:18:57 +00:00
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│vi: set et ft=asm ts=8 sw=8 fenc=utf-8 :vi│
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╞══════════════════════════════════════════════════════════════════════════════╡
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│ Copyright 2020 Justine Alexandra Roberts Tunney │
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│ │
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│ This program is free software; you can redistribute it and/or modify │
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│ it under the terms of the GNU General Public License as published by │
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│ the Free Software Foundation; version 2 of the License. │
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│ │
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│ This program is distributed in the hope that it will be useful, but │
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│ WITHOUT ANY WARRANTY; without even the implied warranty of │
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│ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU │
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│ General Public License for more details. │
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│ │
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│ You should have received a copy of the GNU General Public License │
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│ along with this program; if not, write to the Free Software │
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│ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA │
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│ 02110-1301 USA │
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╚─────────────────────────────────────────────────────────────────────────────*/
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/ Documentation for Intel(R)'s “Most Complicated Instruction”(TM)
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/
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/ mnemonic op1 op2 op3 op4 modif f description, notes
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/ ═══════════ ════ ════ ════ ═══ ════════ ═════════════════════════════
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/ PCMPESTRM XMM0 Vdq Wdq ... o..szapc Explicit Length, Return Mask
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/ PCMPESTRI rCX Vdq Wdq ... o..szapc Explicit Length, Return Index
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/ PCMPISTRM XMM0 Vdq Wdq Ib o..szapc Implicit Length, Return Mask
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/ PCMPISTRI rCX Vdq Wdq Ib o..szapc Implicit Length, Return Index
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/
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/ CF ← Reset if IntRes2 is equal to zero, set otherwise
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/ ZF ← Set if any byte/word of xmm2/mem128 is null, reset otherwise
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/ SF ← Set if any byte/word of xmm1 is null, reset otherwise
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/ OF ← IntRes2[0]
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/ AF ← Reset
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/ PF ← Reset
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/
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/ PCMP{E,I}STR{I,M} Control Byte
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/ @see Intel Manual V.2B §4.1.7
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/
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/ ┌─0:index of the LEAST significant, set, bit is used
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/ │ regardless of corresponding input element validity
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/ │ intres2 is returned in least significant bits of xmm0
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/ ├─1:index of the MOST significant, set, bit is used
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/ │ regardless of corresponding input element validity
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/ │ each bit of intres2 is expanded to byte/word
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/ │┌─0:negation of intres1 is for all 16 (8) bits
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/ │├─1:negation of intres1 is masked by reg/mem validity
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/ ││┌─intres1 is negated (1’s complement)
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/ │││┌─mode{equalany,ranges,equaleach,equalordered}
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/ ││││ ┌─issigned
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/ ││││ │┌─is16bit
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/ u│││├┐││
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.Lequalordered = 0b00001100
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.Lequalorder16 = 0b00001101
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.Lequalranges8 = 0b00000100
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